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        Graphene-based in-plane heterostructures for atomically thin electronics

        2018-12-29 07:53:28LIUJunjiangLIRuijieLIHangLIYifeiYIJunheWANGHaichengZHAOXiaochongLIUPeizhiGUOJunjieLIULei
        新型炭材料 2018年6期

        LIU Jun-jiang, LI Rui-jie,, LI Hang,, LI Yi-fei, YI Jun-he, WANG Hai-cheng, ZHAO Xiao-chong, LIU Pei-zhi, GUO Jun-jie, LIU Lei

        (1.Key Laboratory of Interface Science and Engineering in Advanced Materials of Ministry of Education, Taiyuan University of Technology, Taiyuan030024, China;2.Department of Materials Science and Engineering, College of Engineering, Peking University, Beijing100871, China;3.National Center for Materials Service Safety, University of Science and Technology Beijing, Beijing100083, China;4.Institute of Materials, Chinese Academy of Engineering Physics, Jiangyou621908, China)

        Abstract: Two-dimensional materials are promising for use in atomically thin electronics, optoelectronics and flexible electronics because of their versatile band structures, optical transparency, easy transfer to a substrate and compatibility with current technology for integrated circuits. Three key components of contemporary integrated circuits, metals, insulators and semiconductors, have analogues in two-dimensional materials, i.e., graphene, boron nitride (BN) and transition metal dichalcogenides (TMDCs), respectively. Their controlled integration in a single layer is essential for achieving completely two-dimensional devices. In this review, we briefly describe the latest advances in graphene-based planar heterostructures, in graphene-BN, and in graphene-TMDC heterojunctions, focusing on the fabrication methods, the interfacial structure characteristics at the atomic scale and the properties of prototype electronic devices. The challenges and prospects in this field are also discussed.

        Key words: Graphene; In-plane heterostructure; Interface structure; Field-effect transistor; Logic device

        1 Introduction

        In 1965, Intel co-founder Gordon Moore had the prediction of the famous Moore’s law based on the simple observation that the number of transistors per square inch on integrated circuits will double every year[1],and it has been proven correct during the last half-century. Nowadays, as a gate node in silicon complementary metal-oxide-semiconductor (CMOS) device get smaller, the rising leakage currents and power dissipation together constitute the major challenge for further reducing the size. Next-generation electronics call for the alternatives of newly-developed channel materials or novel device concept. Meanwhile, the semiconductor market, for example, wearable devices and transparent display, requests distinct properties of components in the materials’ perspective.

        Since the first successful isolation of graphene in 2004[2], two-dimensional (2D) materials, free of dangling bonds in the 3rddimension, has attracted enormous attention owing to the versatile choices in 2D library[3,4], interesting physics[5,6]and superior chemical properties[7,8]and promising applications[9]. In particular, 2D materials possess optically transparent and mechanically transferrable features and can be bent without compromising their performance too much, making them suitable for the specific applications in transparent and flexible electronics[10,11]. The sound integration of multi 2D materials who hold different electrical properties to achieve logic function is one of the critical steps towards 2D electronics[12]. While graphene, one celebrated 2D material, can serve as the very conducting metal[13], 2D crystals can also provide insulators, for example boron nitride (BN) as a dielectric, and semiconductors[14]like transition metal dichalcogenides (TMDCs)[15], constituting a full set of three key building blocks for 2D electronics. Also, these 2D materials and their in-plane heterostructures have been prepared by the chemical vapor deposition (CVD) method in a controlled manner[16], providing a solid foundation for exploring 2D electronics[17].

        In this Review, we mainly focus on the growth methods of the graphene-based 2D planar junction, the interface structures and properties, and the prototype electronic devices, as shown in Fig. 1. The in-plane epitaxial growth is highlighted to generate the unique one-dimensional (1D) interfaces. We also comment on the vital challenges 2D electronics faced and potential applications when incorporated with 3D conventional devices.

        Fig. 1 Schematic for graphene-based in-plane heterostructures for 2D electronics, including graphene-BN and graphene-TMDC heterostructures.

        2 Synthesis of lateral BN-graphene (BN-G) heterostructures by CVD

        Due to the concise configuration of the setup and high repeatability of growth recipe, the CVD approach is widely accepted for the synthesis of low-dimensional nanostructures, including 1D nanotubes[18,19], nanowires[20]and 2D thin films[21]. With the incorporation of metal catalysis, the growth temperature can be enormously reduced to have a mild and well-controlled process. In particular, one milestone in graphene synthesis is achieved by Li et al. with large-area graphene monolayers on commercial Cu foils[22], although about one year ago. Reina et al. reported multilayer graphene films can be obtained by the CVD growth on the deposited polycrystalline Ni film[23]. In contemporaneity, two groups have demonstrated that atmospheric vapor CVD can be adapted to hexagonal BN thin film as well[24,25]. The works lay at the basis of the in-plane BN-G heterostructure growth via the CVD approach on the same catalytic metal surface by introducing corresponding precursors into the reaction hot zone sequentially[26,27]. In this section, we will discuss two types of in-plane growth stemming from two distinct purposes.

        2.1 Designed patterning in BN-G heterostructures

        While precisely spatial control down to tens of nanometer over the transport properties in the thin film can be achieved in contemporary integrated circuits by mature nanofabrication procedures, the designed patterning in BN-G films has been pursued naturally after the success of growing graphene and h-BN individually. The pioneering work demonstrated by Levendorf et al. called the strategy “patterned regrowth”, which results in a mechanically continuous BN-G heterostructure film[12]. As shown in Fig. 2a, the first graphene film represented by G1was grown on Cu foil; with the photolithography (PL) and reactive ion etching (RIE), graphene film was partially etched following the desired pattern; the last step is to perform the 2ndgrowth of BN labelled by BN2, where the etched and uncovered Cu regime can be exposed to BN species and thus acted as the catalyst substrate. To characterize the continuity of BN-G junction, a dark field transmission electron microscope (DF-TEM) was utilized to highlight the regions with different lattice orientations[28]. The representative false-colored DF-TEM image of BN-G junction as shown in Fig. 2b confirmed a seamless interface in the heterostructure. Furthermore, Electron energy loss spectroscopic (EELS) elemental 2D mapping was also performed and the intensity profile of the cross-sectional BN-G junction is shown in Fig. 2c, suggesting that as-grown BN-G junction is a lateral heterojunction rather than the vertical stack, with a transition alloy zone less than 10 nm. Liu et al. reported that by the two-step growth and intermediated Ar+iron patterned etching, periodic domains with controllable domain sizes can be generated within the planar BN-G heterostructure[29]. A micrometer-sized owl-like pattern is shown in Fig. 2d. They further show that patterned BN-G films can be peeled off and transferred to versatile surfaces such as flexible transparent substrates for peculiar applications. Notice that based on the diffraction results of DF-TEM (Fig. 2b) and scanning transmission electron microscope (STEM) characterizations, two lattices from BN and graphene is not aligned, indicating that this patterned regrowth doesn’t initial from the edge of 1stmaterial, instead, very likely from the nucleation sites on the exposed Cu area. Apart from the two-step growth strategy, an in-situ approach converting BN to graphene by the noble metal Pt catalyst was demonstrated by Kim et al[30]. The left panel of Fig. 2g shows the schematic of this method: one pre-grown BN film was transferred onto a substrate partially covered by Pt. The underlying Pt layer can facilitate the hydrogenation of BN at 1 000 ℃ and subsequent graphene growth by introducing methane into the furnace so that Pt controls this conversion reaction and thus the formation of in-plane heterostructures.

        Fig. 2 (a) Schematic for the patterned regrowth process. (b) False-colored DF-TEM image of BN-G heterojunction with a sharp interface. (c) EELS elemental map of one BN-G junction (upper panel) and intensity profile across the interface(the red curve for carbon, the green curve for boron; bottom panel). Reproduced with permission[12]. (d) An optical image of an owl pattern within a BN-G film, scale bar: 100 μm. (e)-(f) STEM image (e) and fast Fourier transform (FFT) patterns (f) of the graphene/h-BN interface, scale bar: 1 nm. Reproduced with permission[29], and (g) Illustration of mask-free patterning process on the Pt-patterned substrate for the BN-G heterostructure (left panel) and the corresponding optical image (right panel). Reproduced with permission[30].

        2.2 Epitaxial growth of BN-G heterostructure templated by edges

        Although the patterned regrowth method offers the flexibility to easily control the domain size and spatial arrangement, the nucleation sites on bare Cu surface rather than the existing edge deny the orientation alignment, resulting in a rough interface at the atomic scale and the alloyed transition zone. However, one’s intuition is that it could be interesting if the transition can take place within one or two lattice constants. The epitaxial growth templated by the edge addressed this challenge thoroughly.

        Liu et al. first reported the approach to obtain the in-plane epitaxial heterostructure with the atomically sharp interface[31]. Fig. 3a shows the schematic of the growth strategy. Starting from the CVD-grown fully-covered monolayer graphene on Cu foil, one step of in situ hydrogen etching was intentionally introduced to create a fresh zigzag-type edge in graphene. The role of hydrogen in the determination of graphene edge configurations have been well studied[32]. Without cooling down, the 2ndgrowth of BN was performed immediately and the fresh edges act as the preferential nucleation sites. After hydrogen etching, the outer edge becomes more regular and hexagonal holes with 120° of angles forms are observed by scanning electron microscope (SEM) image (Fig. 3b). Eventually, the BN will fill in the bare regions entirely (Fig. 3c). Atomic-scale scanning tunneling microscope (STM) image around the boundary shows a continuous interface with the lattice-aligned fact (Fig. 3d). More importantly, this lattice coherence is unambiguously confirmed at the micron scale and multi-locations by systematic micro-low energy electron microscope/diffraction (LEEM/D) experiment. Fig. 3e-3g shows with respect to the underlying large-scale Cu single crystal lattice, the BN epi-layer has the same rotational angle (-6°) with that of graphene core; whereas the pure BN islands without graphene have a very strict alignment requirement with the Cu substrate[33]. Thus, the epitaxial growth templated by graphene edge is achieved unprecedentedly in two-dimensional space.

        Fig. 3 (a) Scheme for epitaxial BN growth by graphene edges. (b) SEM image of hydrogen-etched graphene. (c) SEM image of the BN-G heteroepitaxial structure. (d) STM image of the BN-G heterostructure, showing the atomic sharp interface. (e)-(g) LEED patterns of acquired at graphene (e) and BN (f) area and atomic schematic (g), demonstrating the aligned lattices (red, graphene spots; blue, Cu spots; green, BN spots). Reproduced with permission[31]. (h) Illustration for the growth of in-plane BN-G heterostructures by in situ BN etching and (i)-(j) SEM image (i) and STM image (j) of the resulting heterojunction. Scale bar: 2 μm in (i) and 2 nm in (j).Reproduced with permission[34].

        The growth sequence can be reversed by adopting other etching methods. Gao et al. demonstrated a temperature-triggered switching growth between the in-plane and vertical heterostructure of graphene and boron nitride via an exquisitely designed chemical approach[34]. As shown in Fig. 3h, the benzoic acid precursor can be pyrolyzed above 500C and the resulting products include hydrocarbon species that act as the carbon sources later and carbon dioxide which can etch BN when the temperature exceeds 900C. When the growth temperature for graphene is chosen to be higher than 900C, the pre-grown complete BN film is partially etched away with underlying Cu exposed to hydrocarbon to form an in-plane heterojunction, whereas a vertical graphene-BN stack can be obtained while the 2ndgrowth temperature is below the threshold point. As shown in Fig. 3i and 3j, the SEM and STM results demonstrate a large-scale seamless planar heterojunction.

        The epitaxial growth from the 1statomic thin film’s edge ensures the lattice coherence between two crystals, and more importantly, minimizes the growth of the alloyed BCN phase, resulting in a one-dimensional BN-G interface with a transition width of less than 0.5 nm[31]. The well-defined microstructure achieved by the epitaxial growth is consistent with the atomic model built in the theoretical calculation, where the clean structure is always preferred[35,36]. The peculiar properties, especially the renormalization of electron behavior, have been predicted in this classic 1D graphene-BN interface, including the spin-polarized interface state and half-metallicity feature. The successful approach of this ideal nanostructures encourages the further exploration of structural and physical properties[37,38].

        2.3 Interface structure and properties in the planar BN-G junction

        With the advent of monolayer heterostructure in 2D space, the structural details and local electronic structure can be pursued with atomically-resolved instruments. By TEM/STEM, one of two contemporary tools having atom resolutions[39-41], the scientists have very limited results for the graphene-BN in-plane junction, owing to the instability of two monolayers’ interface during sample preparation[42]. STM and scanning tunneling spectrum (STS) become the major methods to study the atomic configurations and electron behavior around this interface[43-46].Gao et al. have performed a systemic STM study on the interface prepared by a two-step patching growth process on Rh (111)[47], on which the graphene and BN show two distinct superstructures: a periodic nanomesh pattern (Fig. 4a) for BN on Rh (111) and a conventional triangular superlattice (Fig. 4b) for graphene on the same substrate. These features arise from atomic lattice coincidence of the single crystal metal substrate and vertically epitaxy-grown monolayers, and largely facilitate the identification of interface bonding as well[48]. Fig. 4c and 4d present typical atomically-resolved STM images with armchair- and zigzag- linked interfaces, respectively. Based on experimental statistics, the proportion of the zigzag edge over armchair boundaries is 77.64∶ 22.36, strongly suggesting that zigzag-type bonding is much preferred during CVD growth[49]. The findings have been supported by the DFT calculation (Fig. 4e), indicating that either B-C or N-C zigzag bonding are more energetically favored compared with the armchair type.

        Fig. 4 (a)-(d) STM images of BN (a), graphene (b), armchair- (c), and zigzag- linked interface of BN-G junction. (e) Bonding energy calculations from three type interfaces. Reproduced with permission[47]. (f)-(i) The STM topography images (f, h) and corresponding dI/dV conductance maps (g, i) of the epitaxial BN-G heterostructure. (j)-(k) Averaged line profiles across the boundary regions marked in (g) and (i), respectively. Reproduced with permission[53].

        Apart from the interface bonding configuration, the modulation of electronic structures as predicted by previous theoretical results is much more appealing[50,51]. One prerequisite is the well-defined microstructure around the interface. From this perspective of view, the edge-templated growth which induces the planar epitaxy can provide superior target materials, which the vertical epitaxy between underlying metal and graphene/BN epi-layers is then excluded naturally due to the random coalescence between graphene and BN to form disorder interface[52]. Park et al. have revealed, for the first time, the 1D boundary state based on the in-plane epitaxial heterostructure mentioned above (Fig. 3a-3g)[31]. To avoid any transfer process, the long-time annealing of as-grown samples on the commercial Cu foil is necessary to ensure the flatness and consequently atomically imaging. The assignments of BN and graphene are accomplished by different features in STS where graphene shows a dip around the Dirac point of -0.35 V and BN has a wide band gap of ~ 4.0 eV[53]. Very surprisingly, only zigzag type interfaces, composed of several segments forming 120°angles (Fig. 4f and 4g) have been found, indicating the more energetically favorable fact. Based on the differential conductance dI/dVmeasurement, the enhanced local electronic density of states (LDOS) have been observed at two different biases (Fig. 4h and 4i). Combining with calculation results, two distinct types of the interfaces were identified as B- and N-terminated boundaries, respectively. More importantly, the spatial distribution of the interface states is strongly anisotropic, showing delocalization characteristics along the boundary and nanometer-sized decay length into graphene and BN. The capability of identifying termination types experimentally enables the scientists to explore the possibility to control the chemical bondings around the interface, which fundamentally determines the magnetic-related properties[54]. Also, it is worth noting that the spin-polarized feature as predicted in the free-standing case is destroyed by the interaction between monolayer and Cu substrate. Further investigation on insensitive substrates, Au for example, can be intriguing for magnetism and spin-related properties around this 1D interface.

        3 Synthesis of in-plane graphene-semiconducting 2D materials

        The emergent TMDCs have shown potential applications in novel optoelectronics and flexible electronics owing to the tunability of the bandgap and large-scale synthesis on versatile substrates[55]. Recently the wafer-scale uniform growth has been demonstrated via metal-organic CVD and thermal CVD[56-58]. One interesting question is how to integrate semiconducting TMDCs with the well-studied conductive 2D crystal, such as graphene, with the controlled spatial resolution aiming to functional devices.

        Ye et al. first demonstrated the chemical synthesis of a graphene-MoS2heterojunction[59]. The growth schematic is shown in Fig. 5a. The graphene was etched partially by oxygen plasma, followed by CVD of MoS2in which the growth is initiated at the edge of the graphene and eventually filled with the entire exposed channel (Fig. 5b). The heterostructure can be easily scaled up to the millimeter level. Note that the dangling bonds and lithographic residues at the edges of graphene allow for MoS2nucleation preferentially. Annular dark-field STEM (ADF-STEM) was utilized to study the structure of the graphene-MoS2junction (Fig. 5c). A seamless film was obtained, suggesting the continuity across the interface. Multi 2ndand 3rdlayers of MoS2were observed around the edge of graphene, rather than the surface of graphene away from the interface, indicating that MoS2was preferred to nucleate at the graphene edge.

        Fig. 5 (a) Schematic of the graphene-MoS2 heterostructure growth. (b) SEM image of the MoS2 filling the channels of the graphene. (c) ADF-STEM image of the graphene-MoS2 junction, revealing an average width of 100 - 200 nm for the transition zone (Scale bar: 400 nm, reproduced with permission[59]). (d)-(e) Optical images before and after WSe2 CVD growth in the channel. (f)-(i) Cross-sectional TEM images of the MLG region (f) and MLG-WSe2 heterostructure area (g). The gradual reduction of WSe2layers to the monolayer, (i) has been observed (h). Scale bars in (f)-(i): 5 nm,reproduced with permission[60].

        Multilayer graphene (MLG)-WSe2heterostructures have been demonstrated by Tang et al[60].With photolithography and dry etching, MLG was etched to form a channel for selective filling of WSe2by CVD growth (Fig. 5d and 5e). No apparent gap was detected in the optical images. Cross-sectional high-resolution TEM was used to reveal the microscopic structure of MLG-WSe2junctions. As shown in Fig. 5f, the thickness of graphene film in the selected area is 3.7 nm, corresponding to 10 layers. Surprisingly, WSe2penetrates into MLG regions, generating an MLG-WSe2-sapphire vertical sandwich (Fig. 5g). The strong interaction between the WSe2and sapphire substrate is ascribed to the growth of WSe2into the MLG. Another characteristic of the MLG-WSe2junction is that away from the intersection area, the layer number of WSe2is gradually reduced from the few layers to the single layer within tens of nm. One representative transition from 4 layers to monolayer WSe2is shown in the Fig. 5h and the thickness of thin WSe2is 0.62 nm, corresponding to the single layer (Fig. 5i).

        Compared with the BN-G heterostructure whose building blocks hold very small lattice constant mismatch, the incorporation of graphene with semiconducting TMDCs shows similar “edge nucleation”-“growth out” approach but very distinctive interface structures. The large lattice mismatch in the latter case in principle denies the lateral epitaxial template growth, suggesting much disorder interface and the existence of adlayers. However, the semiconducting nature offers the capability of an electric field control, which is at the heart of functional electronic devices.

        4 Graphene-based heterostructure electronic devices

        The discrepancy of building units’ band structures and thus conductivity in graphene-based heterostructure brings precise spatial engineering of electronic properties in atomically thin circuitry, where graphene acts as the conducting wire, BN is a good insulator, and semiconducting TMDCs can be turned on/off by field gating effect. The first attempt in this field was conducted in the graphene-BN system.

        4.1 Atomically thin BN-G electronics

        Levendorf et al. reported the “patterned regrowth” method to form desired graphene and BN nanohybrids in one continuous monolayer and demonstrated its potential in atomically thin circuits[12]. The conducting behavior was confined in patterned graphene stripes, whereas BN shows no conducting response as expected (Fig. 6a).

        Fig. 6 (a) Left: electrodes contact graphene strips in BN-G heterostructure; right: corresponding I-V characteristics. (b) A model of a cross-junction in two layers by putting together two BN-G heterostructures vertically. (c) Electrostatic force microscopy (EFM) phase image of the same junction. (d) Upper: the false-colored optical image of heterointerface devices. Bottom: the corresponding Raman mapping,reproduced with permission[12] and (e) radiofrequency measurement of BN-G resonator, inset: optical image of a BN-G layer resonator,reproduced with permission[29].

        This confinement characteristic endows graphene-BN hetero-sheets with one meaningful function: wire arrays for three-dimensional circuits. While putting one hetero-sheet composed of the alternating BN and graphene regions on top of another with 90°rotation (Fig. 6b), the graphene stripes in each layer can be engineered to contact with metal pads (Fig. 6c) with the negligible additional contact resistance between two graphene layers, proving that such 2D films can be utilized for atomically flat interconnects. Moreover, the doped heterostructures can also be achieved by introducing dopants into one growth and was confirmed by Raman mapping (Fig. 6d), allowing for the introduction of active components, p-n junctions for example, into graphene-based 2D electronics.

        Fig. 7 (a) An optical image of three-terminal, side-gated FET based on the BN-G heterostructure. Dashed black lines indicate two graphene sheets, and the yellow line represents the BN region. Scale bar is 10 um. (b) The transfer curve of the device. Reproduced with permission[42].

        Giving the ultrahigh mobility in graphene, within the graphene-BN heterostructure one can implement the function process in the high-frequency application as well. Liu et al. demonstrated a BN-G split closed-loop resonator[29]. The inset of Fig. 6e is an optical image of this miniature resonator, in which BN serves as the insulating dielectric matrix. Fig. 6e shows theS21(insertion) andS11(return) loss versus frequency, indicating the resonating frequency at ~1.95 GHz which is close to that of copper microstrips with similar geometries[61]. The graphene-BN heterostructure resonator, compared with conventional metal-based one, allows for compact and flexible microwave devices and can be incorporated into other graphene-based functional devices readily[62].Another proof-of-concept electronic functionality toward 2D electronics has been demonstrated by Han et al. with BN serving as the side gate dielectric[42]. Fig. 7a is an optical image of three-terminal, side-gated field effect transistor (FET). Two graphene islands are connected by one narrow BN strip with the width of ~ 1.2 μm, and the right graphene served as the side gate is contacted with the metal lead. The measured transfer curve in Fig. 7b shown by global back Si gate has the typical V-type behavior in ambient and vacuum environment, while under both scenarios the side-gated device shows the efficient field-effect control with the 5 times smaller transconductance due to smaller geometric capacitances under the side gate situation.

        4.2 Graphene-TMDCs heterostructure-based devices

        For semiconducting 2D layers, the contact between materials and metal leads is crucial for the performance of electronic and optoelectronic devices since the inherent Schottky barrier (SB) formed at the contact regions plays the critical role in the charge carriers injection from metals into the semiconducting channels[63]. It has been demonstrated that graphene is an efficient contact media to reduce largely the SB, even achieving ohmic contact with MoS2by tuning the Fermi level of graphene[64]. This electrical “buffer” technique in 2D electronics is based on physical transferring graphene onto 2D TMDCs, which stimulates the exploration of contact resistance in in-plane graphene-semiconducting TMDC junctions where the covalent chemical bonds, instead of the vdW interaction, come into play.

        Zhao et al.have performed the transport measurement on CVD-grown graphene-MoS2heterostructure transistors (Fig. 8a)[59]. Fig. 8b shows a representative transfer curve (IDS-VTG) with an on-off ratio of ~ 106. By the transfer length method the length-dependent resistance has been extracted in graphene and heterostructure devices (inset of Fig. 8c). The total resistance in the metal-graphene-MoS2device is plotted in Fig. 8c and the resulting contact resistance for graphene-MoS2heterostructure is ~10 kΩ μm, 10 times smaller than that of the physically transferred MoS2monolayer (CVD-grown) and graphene junction (~100 kΩ μm)[65]. Tang et al. have studied the electrical properties of three types of graphene-WSe2junctions in which single layer graphene (SLG), multilayer graphene (MLG), andp-doped multilayer graphene having a smaller grain size (p-sMLG) serve as source and drain contact, respectively (Fig. 8d-f)[60]. The contact resistance extracted by a Y-function method for three schemes are 2.4108, 1.5107, and 4.9104Ω μm, respectively, indicating MLG planar contact, compared with SLG in-plane bonding, has the more prominent effect on reducing the contact resistance. Forp-sMLG device in which doping in graphene is quite stable under thermal treatment, the downward shifting of Fermi level in graphene can further reduce the barrier for holes (a qualitative schematic of the band diagram is shown in Fig. 8d-f), leading to an enhanced on-state current by at least 2 orders of magnitude (Fig. 8h). This finding is illuminating for achieving high performance device in 2D heterostructure electronics by spatially controlled doping.

        Fig. 8 (a) A representative optical image of graphene-MoS2 FET devices array. (b) IDS-VTG and g-VTG (inset) curves with a source-drain voltage of 1 V. (c) Contact resistance of the total and graphene-only devices. Inset: Typical transfer length method used for extracting the contact resistance. Reproduced with permission[59]. (d-f) Device configurations for SLG-(d), MLG-(e), and p-doped sMLG-(f) WSe2 heterostructure, (g) The band diagram for the p-doped sMLG-WSe2 device. (h) Transfer curves of the three types of graphene-WSe2 transistors. Reproduced with permission[60].

        Fig. 9 (a) Illustration of a graphene-MoS2 heterostructure inverter circuit with a circuit diagram. (b) Transfer curves for driving voltages of 1, 2, and 4 V, showing a threshold voltage of -1.7 V. (c) The inverter voltage gain. Reproduced with permission[59].

        Furthermore, the patterned-regrowth approach for the graphene-based 2D heterostructure allows for wafer-scale sample supply and adequately large platform to construct logic process circuit by standard microfabrication techniques. Zhao et al. have demonstrated in graphene-MoS2heterostructure an NMOS inverter by using two n-type transistors[59]. The illustration is shown in Fig. 9a.Voutstays at the level ofVDDuntilVinis higher than the threshold of ~1.7 V (Fig. 9b), and a very high voltage gain of 70 (one of the highest reported values of all inverters made from TMDC materials)[66-68]can be reached in this device (Fig. 9c).

        5 Conclusion and lookout

        Significant advances have been demonstrated in lateral graphene-based 2D hybrids for atomically thin electronics, mainly focusing on synthesis, structural characterizations, and device applications. The universal CVD approach for the types of building blocks holding distinct electronic structures, including conductive graphene, insulating BN, and semiconducting TMDCs, facilitates the integration of different components within 2D space. The preferential edge nucleation and template growth have been observed and consequently utilized in the planar junction with the smooth interface even at the atomic scale. Moreover, the advanced TEM technique, like z-contrast HAADF-STEM, has been widely explored for the investigation of the atomic structure details. Furthermore, prototypical FET and logic process devices have been demonstrated successfully in BN-G side gate configuration and graphene-TMDCs lateral junction, respectively. In conclusion, by engineering the 2D materials spatially with desired conductive properties, the recent study of electronics within 2D space open the new avenue of pursuing novel low-dimensional electrical applications, in particular, potentially for flexible, transparent electronics, like flexible display and artificial skin, when considering the mechanically flexible and optically transparent characteristics of 2D crystals.

        Although many efforts have been devoted to this goal, there are still some fundamental challenges remaining. One major issue is how to avoid the etching/doping of the 1stmaterials during 2ndgrowth to obtain pure in-plane heterostructures. Also, the undesired adlayers on top of interface regime result from non-template growth, calling for the improvements both at the growth mechanism understanding and superior technique control during the high-temperature environment. Also for achieving the transition from the proof-of-concept discovery into engineering, the explicit demands in application end definitely can boost the study in this research field.

        Last but not the least, 2D electronics can be feasibly integrated onto conventional semiconductors by transfer and thus form the new types of interfaces and functionalities. For example, the separation from monolayer graphene didn’t hamper the remote epitaxial growth of Ⅲ-Ⅴ semiconductors which vdW interaction between monolayer and epi-layer can be utilized to enable layer transfer and vertical stacking of semiconductor heterostructures[69]. A subthermionic tunneling FET has been achieved between p-Germanium and bilayer TMDCs with an average of 31.1 millivolts per decade of subthreshold swing[70]. Another example is based on nano-photonics: the room-temperature single photon quantum emission from 2D BN is considered to be coupled with plasmonic nanocavities supported by silicon dioxides[71]. Although these developments are out of the review’s scope, very recently graphene-based 2D structures have shown a variety of possibilities when incorporated with current semiconductor devices. Therefore now it’s the right time to dedicate efforts to this emergent research field, optimizing and improving 2D electronics to the functional real devices.

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