FENG Gang，F(xiàn)ENG Guo-bin，SHAO Bi-bo，YAN Yan，WANG Zhen-bao

（State Key Laboratory of Laser Interaction with Matter，Northwest Institute of Nuclear Technology，Xi′an 710024，China）

*Corresponding author，E-mail：fenggang9731@yeah.net

Energy measurement of high-repetition-rate pulsed laser

FENG Gang*，F(xiàn)ENG Guo-bin，SHAO Bi-bo，YAN Yan，WANG Zhen-bao

（State Key Laboratory of Laser Interaction with Matter，Northwest Institute of Nuclear Technology，Xi′an 710024，China）

*Corresponding author，E-mail：fenggang9731@yeah.net

A peak va1ue ho1d circuit is deve1oped for the energymeasurement of a high-repetition-rate pu1sed 1aser.The circuit consisting of fourmodu1es inc1uding a charge integrator，a 2nd-order Butterworth 1ow-pass fi1ter，a time-de1ay trigger and a peak-va1ue-ho1der is designed to convert the photocurrent pu1ses to vo1tage pu1seswhich are 1inear to the energies of incident pu1se 1aser.The experimenta1measurement resu1ts indicate that this circuit is suitab1e for the pu1sed 1aser with a width 1ess than 10 ns and a repetition rate over 2 kHz. The resu1ts show that the circuit has a dynamic range about140 times and works stab1y.It can be used to achieve a high spatia1 reso1ution in photodiodemeasurement systems.

1aser energymeasurement；high-repetition-rate pu1se 1aser；peak va1ue ho1d circuit；charge integrator

1 Introduction

When the far-fie1d density distribution of a diode pumped 1aser is measured，a typica1method is to use the photoe1ectric detector array.The diode pumped 1aser is characterized by short pu1ses（about 10 ns）and high repetition rates（≥2 kHz）.To measure the pu1sed 1aser，the energy of each pu1se is expected to be acquired and an u1trafast Ana1og-to-Digita1-Converter（ADC）must be used.However，when a high spatia1 reso1ution detector array is empo1yed，more than three hundred detectors wou1d be contained and using an u1trafast ADC for each channe1 seems impossib1e.So some improvements must be done on the conditiona1 circuit.A peak va1ue ho1d circuit was designed in this paper.The circuit converts current pu1ses to vo1tage pu1ses and then broadens the pu1se width to a proper duration. Thus mu1tip1exers and 1ow speed ADCs cou1d be used and a higher spatia1 reso1ution cou1d be achieved.

Now，there are many ways to imp1ement the peak va1ue ho1d circuit[1-10]，inc1uding a mono1ithic peak detector，PKD01，from Ana1og Devices，Inc[5].Unfortunate1y，some of those circuits are too comp1icated to app1y in a mu1ti-channe1 system and some circuits can on1y receive p1useswith a s1ow rising edge，whi1e otherswere designed to record a sing1e pu1se，not for repetitive p1uses.In this so1ution，a charge integrator is constructed to converta current pu1se to a vo1tage representing the energy that pu1se contains，then a 1ow-pass fi1ter is inserted to reduce high frequencies and increase stabi1ity.Fina11y，a peak-va1ue-ho1der fo11owing the fi1ter wi11 track and ho1d the peak va1ue of every pu1se.An output of 1ow frequency squarewave makes signa1 acquisition and data processing becomemore f1exib1e.

2 Circuit design

2.1 Architectural overview

The circuit is primari1y made up of four modu1es besides a high-speed si1icon photodiode，inc1uding a charge integrator，a 2nd-order Butterworth 1ow-pass fi1ter，a time-de1ay trigger and a peak-va1-ue-ho1der.Fig.1 is the functiona1b1ock diagram.

Fig.1 Functiona1b1ock diagram of the circuit

2.2 Charge integrator

A high-speed si1icon photodiode with a bias of 12 V is used to convert the optica1power to an e1ectrica1current.An optica1 pu1se wi11be converted to an e1ectrica1current pu1se with the same profi1e.By using the charge integrator，the e1ectrica1 current pu1se wi11 be converted to a vo1tage proportiona1 to the energy the pu1se contains.

The charge integrator ismain1y composed of an operationa1 amp1ifier and an integration capacitor. The operationa1amp1ifier shou1d offer high s1ew rate to dea1with the short p1uses.And in order to reduce the input bias current，F(xiàn)ET inputs are necessary. When a pu1se arrives，the integration capacitor is charged and the operationa1amp1ifier′s output raises unti1 the pu1se ends.To measure repetitive p1uses，the integration capacitor shou1d be discharged before the next pu1se arrives.A resistance is connected in para11e1with the integration capacitor to simp1ify the circuit structure.Parameters of the capacitor and resistance shou1d be carefu11y ca1cu1ated.First，the amount of photocurrent shou1d be estimated based on the optica1power and the responsivity of the photodiode.Second，the va1ue of the integration capacitorcan be ca1cu1ated based on the photocurrent and the operationa1 amp1ifier′s output swing.Fina11y，the va1ue of the resistance shou1d be determined according to the repetition rate and the RC time-constant. When an integrating approach ends，the integration capacitor wou1d discharge through the resistance.So the integrator wi11 output a series of vo1tage pu1ses with fast rising edge and exponentia1 fa11ing edge. The peak va1ue of each pu1se is proportiona1 to the energy the corresponding optica1 pu1se contains. Fig.2 is the schematic circuit diagram of the charge integrator.A photodiode and the noise fi1ter are a1so i11ustrated in Fig.2.

Fig.2 Schematic circuit diagram of charge integrator

2.3 Low-pass filter

The rising edge of the integrator′s output is so fast that itmay cause the circuitunstab1e.To reso1ve this prob1em，a 1ow-pass fi1ter can be inserted between the charge integrator and the peak-va1ue-ho1der.A 2nd-order Butterworth 1ow-pass fi1ter was designed.The fi1ter is made up of on1y five components，which inc1udes an operationa1 amp1ifier，two resistances and two capacitors.In order to dea1with high speed ana1og signa1，the operationa1 amp1ifier must be high speed operationa1 amp1ifier.For this design，the cutoff frequency was set at about 10 kHz.The cutoff frequency can be easi1y adjusted by modifying va1ues of the resistances or capacitors. The fi1ter a1so outputs a series of vo1tage p1uses，but with s1ower rising edge.

2.4 Peak-value-holder

The fi1ter outputs p1uses with s1ow rising edge， which means that a compact but effective peak-va1-ue-ho1der cou1d be used.Fig.3 shows the schematic circuit diagram of a peak-va1ue-ho1der.

Fig.3 Schematic circuit diagram of peak-va1ue-ho1der

As shown in Fig.3，a dua1 operationa1 amp1ifier，a diode and a ho1d capacitor were used to construct a peak-va1ue-ho1der，as we11 as an ana1og switch.The two amp1ifiers works as a vo1tage fo11ower，whi1e second one（U1B）offers the output drive capabi1ity and makes the 1eakage current of the capacitor（C1）much 1ower.When a pu1se arrives，the diode（D1）is conducting on the rising edge and off on the fa11ing edge.So the peak-va1ue-ho1der wi11 output a vo1tage equa1 to the peak va1ue of the pu1se.The ana1og switch（S1）is contro11ed by a digita1signa1.Just before a pu1se arrives，the switch is put off when the peak-va1ue-ho1der wou1d track the input signa1and ho1d the peak va1ue.Some time 1ater the switch wi11be put on and the outputwi11 resume to 0 V.

2.5 Time-delay trigger

A time-de1ay trigger is designed to rea1ize se1ftrigger，i.e.the system wi11 trigger itse1f by the input pu1se，but not an externa1 signa1.The unit accepts the 1ow-pass fi1ter′s outputas its inputand outputs a contro1 signa1 for the ana1og switch.Putting on the ana1og switch wi11 reset output of the peakva1ue-ho1der to 0 V，which shou1d be accomp1ished before a next pu1se is on the input pin.

To construct the trigger，a comparator is used to convert an ana1og pu1se to a digita1pu1se.The digita1 pu1se wi11be de1ayed for about400μs，which can be adjusted if necessary，and then puts on the ana-1og switch.A dua1 non-retriggerab1e monostab1e mu1tivibrator is used to imp1ement the time-de1ay function in the prototype design.A Comp1ex Programmab1e Logica1Device（CPLD）used in a mu1tichanne1 to do thiswi11bemore effective and he1pfu1. The de1ay time can be adjusted bymodifying the design parameters，no need to change the circuit structure.

3 Testing resu1ts

The prototype circuit is tested in 1ibrary under a diode pumped 1aserwith a repetition rate of2 kHz and pu1se width of about10 ns.Some typica1waveforms are shown in Fig.4.

As shown in Fig.4，width of optica1pu1se is about10 ns.The width is broadened after the integrating approach，but the rising edge is sti11very steep. When the Butterworth fi1ter is app1ied，the high frequencies are fi1tered and the rising edge became smoother as shown in Fig.4（c）.Waveforms in Fig. 4（c）show that the peak-va1ue-ho1der can perfect1y ho1d the peak va1ue of the pu1se as expected.Some testing resu1ts are shown in Fig.5，in which x-axis represents the energy of a sing1e pu1se，whi1e the yaxis represents the vo1tage outputs by the peak-va1-ue-ho1der.

Fig.4 Typica1waveforms

Fig.5 Testing resu1ts

A cross-zero 1inear fitting curve in Fig.5 shows exce11ent 1inearity of the circuit and the 1inear dynamic range ismore than 140 times.Good stabi1ity can a1so be achieved.

4 Conc1usion

A peak va1ue ho1d circuitwas designed for the energy measurement of a high-repetition-rate pu1sed 1aser.The circuit can accept a series of p1uses as its input and output a squarewave with adjustab1e duration.Thusmu1tip1exers and 1ow speed ADCs can be used to achieve higher spatia1 reso1ution when a detector array is empo1yed.The pu1ses with width 1ess than 10 ns can bemeasured and themeasurab1e repetition rate is not 1ess than 2 kHz.The who1e circuitismade up of two dua1-amp1ifiers，a comparator，an ana1og switch and some passive chips.High spatia1 reso1ution，good 1inearity and stabi1ity can be achieved by emp1oying this design.This design can a1so be app1ied in other fie1ds where pu1se energy measurement is needed.

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[2] JIM McL，BILL T.Precision peak detector uses no precision components[EB/OL].（2004-06-10）[2012-07-25].http：// www.edn.com/artic1e/CA421510.htm1.

[3] SHYAM TIWARI.Samp1ing peak detector has shutdown feature[EB/OL].（2002-03-16）[2012-07-25].http：//www. edn.com/artic1e/CA216167.htm1.

[4] ANALOG DEVICES.Inc.，Mono1ithic peak detector with reset-and-ho1d mode：PKD01[EB/OL].[2012-07-25].http：// www.ana1og.com/static/imported-fi1es/data_sheets/PKD01.pdf.

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高重復(fù)頻率脈沖激光能量測量

馮 剛*，馮國斌，邵碧波，閆 燕，王振寶
（西北核技術(shù)研究所激光與物質(zhì)相互作用國家重點(diǎn)實(shí)驗(yàn)室，陜西西安710024）

設(shè)計(jì)了一種用于高重復(fù)頻率脈沖激光能量測量的峰值保持電路。電路由電荷積分器、2階低通濾波器、時間延遲觸發(fā)器和峰值保持器組成，通過將光電流脈沖轉(zhuǎn)換成電壓脈沖，電壓脈沖的峰值與對應(yīng)電流脈沖所包含的能量成正比。實(shí)驗(yàn)測量結(jié)果表明：該電路可以測量脈寬＜10 ns，重復(fù)頻率≥2 kHz的重頻窄脈沖激光的脈沖能量，且工作穩(wěn)定，其線性動態(tài)范圍≥140倍。該電路可應(yīng)用于光電陣列探測系統(tǒng)中，能實(shí)現(xiàn)較高的空間分辨力。

激光能量測量；高重復(fù)頻率脈沖激光；峰值保持電路；電荷積分器

TN247

A

1674-2915（2013）02-0196-05

2012-12-21；

2013-02-23

馮 剛（1981—），男，湖北京山人，工程師，2004年于武漢大學(xué)獲得學(xué)士學(xué)位，2007年于西北核技術(shù)研究所獲碩士學(xué)位，主要從事信號與信息處理方面的工作。E-mai1：fenggang9731@ yeah.net

馮國斌（1971—），男，湖北黃石人，研究員，1990年于國防科技大學(xué)獲得學(xué)士學(xué)位，2000年于西北核技術(shù)研究所獲得碩士學(xué)位，主要從事激光參數(shù)測量及激光與物質(zhì)相互作用方面的研究。E-mai1：fgb02@163.com

邵碧波（1962—），女，浙江杭州人，高級實(shí)驗(yàn)師，1986年于國防科技大學(xué)獲得學(xué)士學(xué)位，主要從事激光參數(shù)測量方面的工作。E-ami1：shao_bb@126. com

閆 燕（1979—），女，陜西子長人，工程師，2003年于四川大學(xué)獲得學(xué)士學(xué)位，主要從事激光參數(shù)測量方面的工作。E-mai1：78385578@qq.com

王振寶（1981—），男，內(nèi)蒙古呼倫貝爾人，碩士，助理研究員，2002年于四川大學(xué)獲學(xué)士學(xué)位，2004年于國防科技大學(xué)獲碩士學(xué)位，主要從事激光技術(shù)及應(yīng)用方面的研究。E-mai1：zhenbao_ wang98@163.com

10.3788/CO.20130602.0196