Muhammad Saad Khan, Hongxin Zhang , Fan Zhang , Sulman Shahzad, Rahat Ullah, Sajid Ali, Qasim Ali Arain, Manzoor Ahmed

1 School of Electronic Engineering, Beijing University of Posts and Telecommunications (BUPT), Beijing 100876, China

2 Beijing Key Laboratory of Work Safety Intelligent Monitoring, Beijing University of Posts and Telecommunications, Beijing 100876, china

3 College of Information Science and Electrical Engineering, Zhejiang University, Hangzhou, Zhejiang, 310027,china

4 Electrical Engineering Department, University College of Engineering & Technology, Bahauddin Zakariya University, Multan, Pakistan

5 State Key Laboratory of Information Photonics and Optical Communications, Beijing University of Posts and Telecommunications, Beijing

100876, China

6 Department of Computer Science, D.G. Khan Campus. University of Education, Lahore, Pakistan

7 Future Internet & Communication Lab (FIB), Department of Electronic Engineering, Tsinghua University, Beijing 100084, China

* The corresponding author, Email: hongxinzhang@bupt.edu.cn

I. INTRODUCTION

Power amplifiers are basically designed by balancing the basic three requirements i.e. efficiency, linearity and bandwidth. But when PA is used in high power applications efficiency is the main concern for a designer. Class E,F are the most commonly used high efficiency PA for which 100 percent theoretical efficiencies may be achieved but at the cost of most common three basic factors i.e. linearity, gain and bandwidth [1][2]. Despite of their advantages in high efficiency category they have limited advantages when it comes to the high radio frequency applications such as in microwave communications where this system makes use of the large bandwidth sacrificing its signal strength [3]. The improvement in efficiency of power amplifiers reduces power consumption and thus diminishes the requirements for heat sink and in turns increases efficiency/performance. A power amplifier consumes major part of power in wireless communication. In order to improve efficiency class-E amplifier is used because of its switching operation,high efficiency at high frequency above 2GHz[4][5].Gallium Arsenide Field Effect transistor[GaAs] is very important device for X-band frequencies because of its stability and power efficiency for low power requirements. For power amplifier and oscillators design GaAs MESFET is an ideal device. In order to design a power amplifier in ADS its linear behavior should be checked first. Therefore various forms of analytical models have been developed in order to understand the behavior of MESFETs [6]. The most important things for FETs linear operation are its drain-source and gate-source voltage characteristics. The simulation results for S parameter which are frequency dependent and linear properties such as maximum gain, stability are affected by the charge model accuracy [7].

In order to improve their spectral efficiency for the next generation communication systems, the authors designed a Class E Power amplifier for X Band operation.

The main aim of this paper is to design and analyze PA which will operate in the portable next generation communication devices and will be used as solid-state transmitter in the terminal stage. The main approach and design is entirely dependent on S-parameters [8]. As we know that load and source terminations are complex impedances so stability is achieved by the conductance which results by the transformation of load and source terminations of the matching circuits [9]. Today the industry is focusing to use 5g communication systems,in future the X-band will be a valuable region of frequency interms for high speed wireless communications. In the era of high speed communication system, the design of a power amplifier is the most crucial thing. Although modern transistors like HEMT and PHEMT can provide far better results than MESFET but they are quite expensive [10]. In MESFETS devices the peak drain to source will occur when the gate voltage reaches about zero which means that these devices work in the depletion mode. The device current reaches to zero as the gate voltage becomes more and more negative. There are two basic parameters which should be kept in mind while designing a MESFET PA, these are the pinch-off voltage and the maximum current. For a system to provide steady performance the drain current of the system must be controlled to adjust the gain and PAE [11].

The next generation communication devices use polar modulators in which the bias tracking of power amplifier is instantaneous and controlled by modulating the supply voltage. The input signal is converted into envelope and phase signals. Further the phase signal goes to the input of power amplifier while the envelop signal moves to the supply of the power amplifier. Eventually, both phase and envelop information are combined at the power amplifier stage.

Fig. 1 MESFET cross-section [12]

II. MESFET ARCHITECTURE DESCRIPTION

As shown in fig.1 a partially depleted MESFET cross section is shown. An important step while designing a MESFET is incorporation of the silicide layer for making spacers between the source-gate and between gate-drain which also helps in preventing shorting, which may occur between its three terminals and thus giving high breakdown advantage to the MESFET [12][13].

In this process a Schottky gate was created by adding metal silicide step over n-well which is lightly doped ss shown in fig.1.The Gate length isLGwhich is the distance between the two spacers andLaDis spacers length to the drain and the access length is defined byLaS, the spacing and sizing ofLaDandLaSare the most important parameters that defined the MESFETS performance [14].

High voltage characteristics of the MESFETs are due to its Schottky gate. Schottky gate can handles very high amount of current flow. MESFETs devices avoid snapback and high electric field gate oxide breakdown which is because there is no thin gate oxide and it is the major cause for failure in MOSFETs[15][16]. In MESFETS the major cause of its breakdown is due to tunneling and avalanche ionization. As soft breakdown reaches in MESFESTs, the surface electric field becomes large and the barrier height becomes lower at gate thus allowing the electrons to tunnel from the gate metal to the channel [17][18]. By increasingLaSandLaDlengths the electric fields can be reduced at gate to drain and from gate to source which will increase the breakdown capability of the MESFESTs [19].

III. MODELING AND SIMULATION OF MESFET

This section deals with the modeling and designing of our device and shows all the necessary simulations steps which will prove that our device is very efficient and unique.

In this design the transistor is biased at drain voltage Vdd=5V, drain current Id=120mA and gate voltage of 0.52V. The drain characteristics and power consumption of the transistor are shown in Fig.2 and Fig.3 respectively.The device consumes 0.603 Watt power and has a very reasonable drain voltage. These parameters make it very reasonable choice for power amplifier design [20][21].The small signal model of MESFET is shown in Fig.4.In this model we have defined all intrinsic and extrinsic parameters of MESFET [25].

In this model

Rgis Gate Resistance

Ldis Gate Inductance

Rsis Source Resistance

Lsis Source Inductance

Rdis Drain Resistance

Ldis Drain Inductance

Riis input Resistance

Rois output Resistance

Cdsis Drain-Source Capacitance

Cgdis Gate-Drain Capacitance

Csdis Source- Drain Capacitance

IV. CIRCUIT ANALYSIS AND DESIGN

The amplifier is designed and simulated using Agilent ADS software, there are two transistors used in the design, the first transistor is setup in the common source configuration and coupled with a source follower MESFET. The reason to choose common source configuration for MESFET is that the common source configuration increases the gain of the MESFET while reducing the output noise of the amplifier. Following are the desired specifications of the amplifier.

Fig. 2 Drain current versus bias curves

The stability Factor is considered the most important design parameter, its value shouldbe more than 1 otherwise the amplifier will generate oscillations. The stability factor is denoted byKfor the stability of amplifier following conditions must be met [22][23].

Table I Amplifier Specifications

Fig. 4 Small signal model of MESFET

Fig. 5 Final Design of amplifier

Where

The DC biasing network is not included in this schematic because it is an S-parameter based simulation. The optimized circuit is shown in Fig. 5

V. SIMULATION RESULTS

5.1 Stability factor

The stability factor of amplifier is shown in Fig. 6, it can be seen in the figure that the stability factor is more than 1 for the complete range of operation. Stability factor is very important in designing any type of amplifier because if this factor is below then 1, we have to implement some external stability controlling device thus increasing our cost of the device and also in turn it will increase the size of the device[24][25]. Device size is the main consideration in designing any type of power amplifier for wireless communication because now a day’s mobile equipment is becoming smaller and smaller so thus the need for better,efficient and small size PA are required operating with maximum efficiency.

5.2 Input and output return losses

The lower values of input and output return losses indicate design of good impedance matching networks. The input and output matching networks are optimized using the Load pull and Source Pull matching techniques. The Load impedance of amplifier is given by

If the value of load impedance is less thanROLthan the value of power depends on max-imum current swing. On the other hand if the value of load impedance is more thanROLthan power depends on maximum voltage swing of the device. The simulated results for input and output return losses are shown in Fig. 7.

5.3 Gain

The amplifier power gain is given by [23].

The transducer power gain is plotted versus fundamental output power as shown in Fig. 8.It can be clearly seen that the amplifier has a transducer power gain of about 25.6dB. The Amplifier input output voltage swing is shown in Fig.9. The values of the amplifier output power are shown in Fig. 10, which shows the graph of Power-Added efficiency (PAE) versus fundamental output power.

VI. COMPARISON

Z. Maet. al.developed a PA using SiGe/Si HBT with lumped passive components, the amplifier has a gain of 8.7 dB, PAE of 30 %and delivers output power trip of 25 dBm [26].Although the amplifier delivers good amount of output power and PAE but the gain of the amplifier is quite low. In [27], the author developed an 850 mW Xband SiGe power amplifier; he claims to have a gain of 13 dB with an output power of 29.3 dBm. The problem with this design is the non flat nature of gain which is very critical for a next generation communication device. In [28] Campbellet.al.designed a compact X band amplifier using GaNFet, the amplifierhas good PoutdBm of 30 dBm but the device has non-flat gain. In [29]Chiet. al.developed a power amplifier using CMOS, the amplifier achieves a gain of 14.5 dB and delivers output power of 23.8 dBm but the PAE is low for this device. In [30] the amplifier delivers large output power of 27.5 dBm but it has an extremely low gain of 5dB,the PAE is also low. The amplifier suggested in this paper provides a good compromise between the power delivered and the gain with a very good value of peaking PAE. The amplifier shows a flat gain of 27 dB for the entire range of operation with peaking PAE of 30 %. The flatness of gain makes this design a preferable choice for the X-band communication. Furthermore the input output return losses of the amplifier are very low. The low values of return losses are result of perfectly matched matching networks. The matching networks are carefully selected and optimized at 9 GHz. The following table shows Gain vs Power output comparison of different research works and our research shows that the PA we designed is unique and has the most gain as compared to the other designs.

Fig. 6 Stability Factor

Fig. 7 Input and output return losses

Fig. 8 Transducer Power Gain versus Output Power

Fig. 9 Input Output Voltage

Fig. 10 Input power versus gain and output power

Table II Comparison

Fig. 11 Layout of power amplifier

VII. LAYOUT OF DESIGN

The layout of power amplifier is designed in Cadence. The FR4 material is selected due to its low thermal losses as thermal losses causes decrease in efficiency of a PA. The Layout of Power Amplifier is shown in Fig. 11

VIII. CONCLUSION

In this work we designed a Class E Power amplifier for X Band operation. The device is suitable for next generation communication devices like 3GPP LTE and WiMax. The device has comparibility better prformance than the recently designed amplifiers interms of gain, power delivered and Peak PAE. The design is optimized for 9 GHz frequency of operation. The amplifier is designed using Microstrip Lines to reduce the size. The Microstrip Lines are non-radiating and do not shows a complex impedance behavior like inductors and capacitors. The design has a high gain of about 25.6 dB, the PAE has peaking value of 30 %.The values of input and output return losses are about 22 dB which shows the accurately designed impedance matching network.

Note

In this paper we have design and analyzed X-band Class E MESFET based Power Amplifier. We have designed and analyzed the PA and showed that our design is more efficient as compared to previous design as shown in the simulated results.

ACKNOWLEDGEMENTS

The Author would like to thank Prof. Zhang Hongxin for his guidance and support during this research work. All the authors have contributed equally to this research work. This work is supported by the National Natural Science Foundation of China (Grant no.61571063, 61472357, 61501100).

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