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        Transformation of Voltage Mode Filter Circuit Based on Op-Amp to Circuit Based on CCII

        2015-07-14 01:20:30ThourayaEttaghzoutijibHassenandKamelBesbes

        Thouraya Ettaghzouti, Néjib Hassen, and Kamel Besbes

        1. Introduction

        Recently, the symbolic analysis has been widely applied in analogue circuits. Based on technique nodal admittance matrix (NAM)[1]-[3], we can transform any looped-application circuit based on op-amp to a circuit based on second-generation current conveyor (CCII). The matrix expansion process begins with introducing blank rows and columns which represent the new internal nodes in the admittance matrix. Then, nullators and norators are used to move the resulting admittance matrix elements to their final locations; therefore, it will be easier to determine whether the passive elements are floating or grounded.

        Nullator and norator are pathological elements, as shown in Fig. 1, which have ideal characteristics. They are expressed in terms of constraints on their voltages and currents. For nullator V=I=0, the norator imposes no constraint on the voltage and current. The union of nullator and norator is called ‘nullor’, which has a nullator input and a norator output[4]-[7]. There are other elements called pathological mirror elements. The voltage mirror (VM) is a two-port element. It is described by: V1= -V2, I1= I2= 0.The current mirror (CM) is a two-port element which is described by: V1, V2, and I1=I2: all of them are arbitrary.

        In 1999, based on pathological elements, Soliman and Awad gave a presentation for second-generation symbolic circuit current conveyors, as shown in Table 1[8].

        Fig. 1. Pathological elements: (a) nullator, (b) norator, (c) voltage mirror, and (d) current mirror.

        Table 1: Circuit CCII-based nullator and norator

        In this paper, based on technique nodal admittance matrix (NAM) and nullator-norator, we transform a voltage a mode filter (band-pass and low-pass) based on amp-op into filter circuit based on CCII and assign all possible proposals. We have simulated these filters with a new circuit current conveyor CCII. This circuit has a rail to rail dynamic range, wide-bandwidth (2.52 GHz) current and wide-bandwidth (2.88 GHz) voltage, and low resistor at terminal X (RX=1.01 Ω). The center frequency of the filter can have a max value, equal to 196 MHz.

        2. Low-Pass Band-Pass Filter

        The concept of CCII was first introduced by Sedra and Smith[9]. This circuit has attracted the attention of a lot of researchers in the field of active filters[10]-[15]and oscillators[16],[17]thanks to its advantages over operational amplifier, such as wide dynamic range, wide bandwidth,high accuracy, and low power dissipation. Our application is a low-pass band-pass filter shown in Fig. 2. Based on the technique nodal admittance matrix (NAM) and elements nullator-norator, we will assign all possible circuits of the filter circuit based on CCII.

        Fig. 2. Low-pass band-pass filter.

        Fig. 3. Block diagram of filter.

        The block diagram of the filter is given in Fig. 3. The transfer functions of the band-pass filter, low-pass filter,and the expression of the center frequency are respectively given by

        with a zero input voltage (Vin= 0), the denominator of (2)and (3) is given by

        This relationship reflects the filter transfer function of the loop part with Vinequal to zero. Transforming the equation to the following matrix form:

        To alter the circuit filter to a circuit based on CCII, we extend the matrix of (5) by adding a third row and third column with element 0, and move G3to the diagonal position (3, 3) by using a nullator between node 2 and node 3 and a current mirror between node 1 and node 3 as follows.

        Then a fourth row and a column are added with element 0, and G4 is moved to the diagonal position (4, 4) by using a nullator between node 1 and node 4 and norator between node 2 and node 4 as follows.

        This is the binding of each component of the matrix to the corresponding node (Fig. 4). In Table 2, we represent all possible circuits of the looped part of filter.

        Fig. 4. Pathological modeling of the loop part of filter.

        Table 2: All possible circuits of the looped part of filter

        Fig. 5. CCII block diagram.

        3. Second Generation Current Conveyor CCII Circuit

        3.1 Theoretical Analysis

        The CCII is a three terminal device as shown in Fig. 5.

        The ideal relation between terminal voltage and current is given by

        In real circumstances, the circuit will introduce parasitic elements. Thus the characteristic equation becomes

        On the terminal Y and Z, two impedances ZYand ZZare specific to a parallel resistor with a capacitor. The impedance ZXon the terminal X is a parasitic resistor RX,where α and β denote respectively current gain and voltage gain.

        The proposed CMOS CCII+ is shown in Fig. 6. The input stage of this circuit is composed of two differential pairs. The differential pair N-MOS (M1, M2) and another differential pair P-MOS (M5, M6) are connected in parallel to implement the voltage follower between the nodes X and Y. Transistors (M11, M12) provide the necessary biasing currents for each differential pair separately.

        Fig. 6. Circuit current conveyor of the proposed CMOS CCII+.

        The operation of this stage can be divided into three regions. In the positive rail region, only the NMOS pair is active. In the mid-rail region both NMOS and PMOS are active, however in the negative rail region, only the PMOS pair is active[18]-[21].

        The input stage model of the proposed CMOS CCII+ is presented in Fig. 7. The voltage gain Avtransition function between nodes X and Y is given by

        where RNand RPare the equivalent resistors of the differential stage type N and type P, where RN=ro1||ro3and RP=ro5||ro7. A1and A2are the respective gains of the two amplifiers with:

        where gmis the transconductance of MOS transistor. ro14and ro17are the internal resistances of transistors M14 and M17. Avis very close to 1 since

        Therefore, VXexactly follows VY.

        Fig. 7. Input stage model of the proposed CMOS CCII+.

        To calculate the parasitic resistance at node X, we have plotted the small signal equivalent circuit of the output stage. The impedance of the node X (RX) is the parallel connection of RXNand RXP.

        The impedance RXNpresented by M17 (Fig. 8) is given by

        Fig.8. Small signal equivalent circuits at the drains of M17.

        Fig. 9. Small signal equivalent circuits at the drains of M14.

        Similarly, the impedance RXPpresented by M14 (Fig. 9)is given by

        The impedance RXof the node X is the parallel connection of RXNand RXP.

        B. Simulation Results of CCII

        The performance of the proposed CMOS CCII+ was verified by TSPICE based on the BSIM3v3 transistor model for the TSMC 0.18 μm CMOS process available from MOSIS[22]. This circuit is powered by ±0.75 V. The transistors aspect ratios of the novel CCII is summarized and given in Table 3.

        Table 3: Aspect ratios of the transistors

        Table 4: Performance characteristics of the CMOS CCII

        The simulation results are presented in Table 4 and shown in Fig. 10 to Fig. 14. These results can be described as follows.

        In the voltage mode, the circuit current conveyor achieves the assured good linearity over the range -0.75 V to 0.65 V, as shown in Fig. 10, a frequency static gain of 0.99913 and a cutoff frequency of 2.88 GHz, as shown in Fig. 11, and the input resistance of 1.01 Ω at the node X, as given in Fig. 12.

        In the current mode, a good linearity was obtained over the interval [-150 μA, 150 μA] (Fig. 13). Fig. 14 shows a static gain of 0.99906 for a cutoff frequency of 2.52 GHz.The parasitic elements on the tracks Y and Z are a resistor in parallel with a capacitor. They are RY||CY(∞||30.3 fF) and RZ||CZ(11.31 KΩ||11.47 fF), respectively.

        Fig. 10. Variation of output voltage as a function of input voltage

        Fig.11. Voltage gain according to the frequency.

        Fig. 12. Resistance RX against frequency.

        Fig. 14. Current gain according to the frequency.

        Fig. 15. Low-pass band-pass filter based CCII.

        Fig. 13. Variation of output current as a function of input current.

        Fig. 16. Result of the simulation of the filter.

        C. Simulation Result of Filter

        To confirm the theoretical results of filter, we add the input stage to one of the proposals presented in Table 2 (Fig.15). The values of the passive components used are: C1= C2= 4 pF and R1= R2= R3= R4= 200 Ω. The center frequency obtained from the filter is 196 MHz (Fig. 16). By variations of the resistors (R1= R2= R3= R4) from 200 Ω to 1 kΩ and the capabilities from 4 pF to 100 pF, the center frequency of the proposed filter is variable on the interval [157 kHz, 196 MHz] (Fig. 17).

        Fig.17. Variation of the frequency as a function of R and C.

        4. Conclusions

        In this paper, based on the technique nodal admittance matrix (NAM) and nullator-norator, we have transformed a low-pass band-pass filter based on op-amp to the filter circuit based on CCII, and obtained eight possible circuits.The CCII is operative at low supply voltage. It has a low parasitic resistance at the terminal X and a high input impedance at terminal Y. The proposed CCII has a rail to rail dynamic range, wide-bandwidth (2.52 GHz) current and wide-bandwidth (2.88 GHz) voltage with a low resistor at the terminal X (RX= 1.01 Ω).

        [1] A. M. Soliman, “Generation of CCII and ICCII based Wien oscillators using nodal admittance matrix expansion,” Int.Journal of Electronics and Communications, vol. 64, no. 10,pp. 971-977, 2010.

        [2] A. M. Soliman, “Generation of current conveyor based oscillators using nodal admittance matrix expansion,”Analog Integrated Circuits and Signal Processing, vol. 65,pp. 43-59, 2010.

        [3] R. A. Saad and A. M. Soliman, “Generation, modeling, and analysis of CCII-based gyrators using the generalized symbolic framework for linear active circuits,” Int. Journal of Circuit Theory and Applications, vol. 36, no. 3 pp.289-309, 2008.

        [4] I. A. Awad and A. M. Soliman, “On the voltage mirrors and the current mirrors,” Analog Integrated Circuits and Signal Processing, vol. 32, no. 1, pp. 79-81, 2002.

        [5] J. A. Svoboda, “Current conveyors, operational amplifiers and Nullors,” IEE Proceedings, vol. 136, no. 6, pp. 317-322, 1989.

        [6] A. Carlosenat and G. S. Moschytz, “Nullators and norators in voltage to current mode transformations,” Int. Journal of Circuit Theory and Applications, vol. 21, no. 4, pp. 421-424,1993.

        [7] C.-M. Chang and P.-C. Chen, “Realization of current-mode transfer function using second-generation current conveyors,” Int. Journal of Electronics, vol. 71, no. 5, pp.809-815, 1991.

        [8] I. A. Awad and A. M. Soliman, “Inverting second generation current conveyors: the missing building blocks, CMOS realizations and applications,” Int. Journal of Electronics,vol. 86, no. 4, pp. 413-432, 1999.

        [9] A. S. Sedra and K. C. Smith, “A second generation current conveyor and its applications,” IEEE Trans. on Circuit Theory, vol. 17, no. 1, pp. 132-134, 1970.

        [10] A. M Soliman, “Current mode filters using two output inverting CCII,” Int. Journal of Circuit Theory and Applications, vol. 36, no. 7, pp. 875–881, 2008.

        [11] S. Maheshwari and I. A. Khan, “Novel cascadable current mode translinear-C universal filter,” Active and Passive Electronic Components, vol. 27, no. 4, pp. 215-218, 2004.

        [12] N. Hassen, T. Ettaghzouti, and K. Besbes, “Highperformance second-generation controlled current conveyor CCCII and high frequency applications,” World Academy of Science Engineering and Technology, vol. 5, no. 12, pp.851-860, 2011.

        [13] A. M. Soliman, “Voltage mode and current mode tow Thomas bi-quadratic filters using inverting CCII,” Int.Journal of Circuit Theory and Applications, vol. 35, no. 4,pp. 463–467, 2007.

        [14] J.-W. Horng, C.-L. Hou, C.-M. Chang, and W.-Y. Chung,“Voltage-mode universal biquadratic filters with one input and five outputs,” Analog Integrated Circuits and Signal Processing, vol. 47, no. 1, pp. 73–83, 2006.

        [15] J. Koton, N. Herencsa, and K. Vrba, “KHN-equivalent voltage-mode filters using universal voltage conveyors,”Int.Journal of Electronics and Communications, vol. 65, no. 2,pp. 154-160, 2011.

        [16] G. D. Skotis and C. Psychalinos, “Multiphase sinusoidal oscillators using second generation current conveyors,”Int.Journal of Electronics and Communications, vol. 64, no. 12,pp. 1178–1181, 2010.

        [17] A. K. Sharma and D. Pal, “Modified CMOS positive current conveyor based true RC sinusoidal oscillator,” Int. Journal of Engineering and Technology, vol. 2, no. 4, pp. 390–393,2010.

        [18] T. Kurashina, “A CMOS rail to rail current conveyor,”IEICE Trans Fundamentals of Electronics, Communications and Computer Sciences, vol. 85, no. 12, pp. 2894-2900,2002.

        [19] T. Ettaghzouti, N. Hassen, and K. Besbes, “Novel CMOS second generation current conveyor CCII with rail-to-rail input stage and filter application,” in Proc. of the 11th Int.Multi-Conf. on Systems, Signals & Devices, 2014, pp. 1–6.

        [20] W. S. Hassanein, I. A. Awad, and A. M. Soliman, “New wide band low power CMOS current conveyors,” Analog Integrated Circuits and Signal Processing, vol. 40, no. 1, pp.91–97, 2004.

        [21] A. H. M. Abolila, H. F. A. Hamed, and E.-S. A. M.Hasaneen, “High performance wideband CMOS current conveyor for low voltage low power applications,” in Proc.of 2010 IEEE Int. Symposium on Signal Processing and Information Technology, 2011, pp. 433-438.

        [22] The MOSIS Service. [Online]. Available:https://www.mosis.com/pages/Technical/Testdata/index

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