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        Laser Driver for Optic Fiber Gyro with 4 mA to 200 mA Drive Current

        2013-11-26 10:47:58FeiXiangChenZongMinWangYingKongandXinMangPeng

        Fei-Xiang Chen, Zong-Min Wang, Ying Kong, and Xin-Mang Peng

        1.Introduction

        The fiber optic gyro is one of the most important optic components used in space and air applications.It is based on the Sagnac effect and detects the vibratility of the mechanical system.It can be used in the area of rocket guidance, aircraft navigation, and so on.Compared with other kinds of gyros, the fiber optic gyro works in different environments, and it has longevity of service and high precision.Fig.1 shows the building block of a high precision optic fiber gyro as an example.

        A superluminescent light emitting diode (SLED)produces wide band light with high optic power and the 1.53 nm to 1.56 nm wave length.The optic power is over 5 mW.The optic fiber sensor is a polarization maintenance(PM) coil conformed by a 2 km-long optic fiber.The PM coil detects the vibratility of the mechanical system and converts it to the integrated optic chip.The signal processed by the chip is coupled to a signal detector and converted to an electronic signal.An optic power noise detector is used to detect the noise signal of the optic power for the digital signal processor (DSP) to filter the noise.The optic fiber gyro is applicable for high precision applications.With this kind of high optic power source, the signal noise ratio(SNR) of the system is limited by the noise produced by the optic source instead of the dispersion noise.One of the key components in the fiber optic gyro is the optical power source.It must provide stable and enough optical power.In practice, it is usually an SLED driven by certain current[1],[2].

        The SLED has current-in to light-out transfer functions as shown in Fig.2.When the drive current of the SLED is over ITH,the optical power of the SLED will be proportional to the drive current.Hence, the optical power of the SLED can be well controlled by controlling the drive current of the SLED.

        The laser driver circuit presented here provides a stable drive current ranges from 4 mA to 200 mA.

        Fig.1.Building block of an open-loop optic fiber gyro.

        Fig.2.SLED current-in to light-out transfer function.

        2.Circuit Description

        2.1 Building Block of the Power Controller

        The building block of the proposed power controller is shown in Fig.3.The design is based on the optic-electric feedback theory.When the system is stable, the power controller provides a stable current to the SLED, so the optic power of the SLED is unchangeable as well.The output current is determined by the external resister when the system is stable.When the environment changes, the optical power of the fiber optic system changes, resulting in the changes in the current produced by the monitor diode.The photoelectric current then is fed back to the power controller and converted to a corresponding voltage value by an external resister, which is compared with the reference voltage.The amplifier transfers the result to the drive current control system which adjusts the drive current of the current source, making the output current of the current source array change accordingly.In this way, the drive current of the SLED keeps unchangeable, which means that the optical power of the fiber optic system stays constant when the environment changes[3],[4].

        As shown in Fig.3, when the system is stable, the current of the drive current IOUTis determined by the external resister REXT.Assume the ratios of I2to I1, I3to I2,IOUTto I3are B1, B2, and B3.The value of the IOUTcan be easily achieved by changing the size of N2, N3, P1, P2,Q1/Q3, and Q2/Q4.The ratio of IOUTto IMis B4which is determined by the specification of the monitor diode used.The relation between REXTand IOUTis shown in (1) to (5).There are five equations and 6 variables (REXTincluded) in(1) to (5), which means with a specified REXT, a specified IOUTis given.The transport function is shown in (6).In the equation, the change of monitor current is decided by (7):

        Fig.3.Building block of the power controller.

        where AOCis common-mode gain of A1, AODis differential-mode gain of A1, and gmN1is transconductance of N1.In the design, the A1 and A2 are single stage cascade amplifiers.So the poles of the system are produced by the amplifiers at the output and current mirror.The pole produced by the current mirror is about fT/(2+B), which is a very high frequency value here, where B is the gain of the crrent mirror.To get a enough phase margin, the output of A1 is connected to ground by a large capacitance and a large resister.So the output of the A1 is the dominant pole.

        2.2 Output Stage

        The output stage is shown in Fig.4.It provides current to drive the laser, directly affecting the SLEDs.

        The output transistors are set as a 10×10 bipolar cascode array.To provide an enough current, the output transistors’ base current needs to be large enough.The base current is provided by Q2and M9.In this design, the output current is 200 mA, assuming that the current gain of the bipolar β is 100.So the base current is 200mA/β at least.M8/M7and Q2/Q1equals 4, which means I3equaling 16I1.M3/M1, M4/M2, M5/M1, and M6/M2equal 2.So the current of the base current of Q3is 14I1, which limits the maximum output current and should be larger than 2 mA.The minimum value of I1is 2 mA/14, which is 142 μA.So the current larger than 142 μA is used to make sure the output transistor stay in the forward-active region.Here the current is 155 μA.

        The Vbias1, Vbias2, and Vbias3are generated by the bias circuit as shown in Fig.5.Vbias2and Vbias3are generated by the classical low voltage cascade structure.Vbias1is generated by an amplifier.The voltage is fed back to the negative port of the amplifier to produce a stable bias voltage.To keep the stability of the system, a capacitance is used to increase the impedance of the point A, making it the dominant pole.The operational amplifier is designed as a single stage cascade amplifier.This ensures a better stability property.

        Fig.4.Output stage.

        Fig.6.Reference current and the calibrate circuit.

        Fig.7.Produce the bias current in Fig.6.

        Fig.8.Layout of the chip.

        2.3 Calibrated Reference Current

        In this design, the output is a current, and many bias voltages are produced through the reference current.So the precision of the reference current is highly important for the drive capability, stability, and precision.

        The reference voltage is produced by a simple first-order compensation circuit.Based on the reference voltage, the reference current is produced and calibrated in Fig.6.It is composed of an error amplifier, a voltage reference, a comparator, a successive approximation register (SAR) logic circuit, and a 6-bit digital to analog converter (DAC).

        Fig.5.Bias circuit.

        The reference current is produced by a feedback circuit composed with a reference voltage circuit, an error amplifier, and a feedback network.The bias currents Iref1and Iref2in Fig.6 are produced in the circuit shown in Fig.7.They are currents based on the reference voltage and VBE,where VBEis the base-emitter voltage.This circuit is simple and has a better power supply reject property than the Widlar current source.The voltage VXis fed back to the positive port of the error amplifier to compare with the reference voltage, and the error amplifier amplifies the difference to bias the gate voltage of M1.In this way, a certain current is produced.To get the current with higher precision, the calibration is required to eliminate errors like the mismatch.

        The calibration is carried out by a SAR logic circuit and a 6-bit DAC.When the calibration begins, the 6-bit DAC input data are defined as 011111, or the half-full scale.The SAR logic will modify the input data of the DAC and change its output current till the reference current value can be equal to the IREFwhich is a off-chip current.If the reference current is equal to the IREF, the calibration stops and a certain word is set to the input of the DAC accordingly.

        3.Simulation Results

        This laser driver has been post simulated.The layout is shown in Fig.8 and the active area is 3.4 mm×3 mm.The“a” part is the output stage, “b” part is the reference voltage and calibrated current circuit, and “c” part is the signal process and control system.The output ability simulation results are shown in Fig.9, which are results in different conditons.In Fig.9, y is the value of the resister with the unit k?, and Yois the output current and the unit mA.

        The transient response for a 4 mA current step in the monitor current is shown in Fig.10.The upper part is the monitor current and the lower part is the bias current.When the monitor current is changing, the bias current changes accordingly, when the changes stop, the current stays in the original level.The response time is less than 10 ns.

        Fig.9.Output ability simulation results: (a) 25 °C, (b) -40 °C, (c)125 °C, and (d) the worst condition when the power supply is 4.5 V and temperature is -40 °C, the corner is slow.

        Fig.10.Transient response for a 4 mA current step in the monitor current.

        4.Conclusions

        A laser driver for the optic fiber gyro is presented,which provides automatic power control, and a closed-loop control technique is used to maintain the drive current stable.The circuits of the proposed system are detailed and the proposed system is capable of producing stable currents range from 4 mA to 200 mA after the initial setup.The laser end-of-life detection is also provided to monitor if the laser is running out of life.The layout and the post simulation results demonstrate that the design can work well.

        [1]U.Killat, Access to B-ISDN via PONs—ATM Communication in Practice, New York: Wiley, 1996, pp.56-57.

        [2]W.M.C.Sansen, Analog Design Essentials, Heidelberg:Springer, 2007, pp.66-67.

        [3]E.S?ckinger, Y.Ota T.J.Gabara, and W.C.Fischer, “A 15-mW, 155-Mb/s CMOS burst-mode laser driver with automatic power control and end-of-life detection,” IEEE Journal of Solid State Circuits, vol.34, no.12, pp.1944-1951, Dec.1999.

        [4]D.-U.Li and C.-M.Tsai, “A 10 Gb/s burst-mode/continuous-mode laser driver with current-mode extinction-ratio compensation circuit,” in Proc.of IEEE Solid-State Circuits Conf., San Francisco, 2006, pp.912-921.

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