Qiang Li

Guest Editorial Special Section on Energy-Efficient Technologies

Qiang Li

Energy efficiency, motivated further by environmental and economic concerns, has been a progressively important topic of extensive research interests in recent years, which finds its research in all sectors ranging from fundamental sciences to government policy-making and management. With its myriad researches, emerging techniques and applications have sprung up in various fields, such as energy-saving materials and devices, low-power circuits and systems, energy-aware and energy-efficient computing, energy-efficient communications and networking, and efficient power engineering.

Being invited byJournal of Electronic Science and Technology, we proposed this special section onEnergy-Efficient Technologies (EET). I am honored to serve as the Guest Editor. From this issue, the JEST special section on EET becomes a routine section of the journal, and the focus of each issue will be placed on a dedicated sub-topic. This issue concernsEnergy-Efficient Design of Integrated Circuits and Systems. We are expecting that the launch of this EET special section will encourage researchers to pay more and more attention to this hopeful and significant area and bring together the state-of-the-art research results and industrial applications of energy-efficient technologies. Through serious peer-review, in this issue, we have published two papers dealing with the analog and digital integrated circuits, respectively.1

This section beginning with a review “Overview of Energy-Efficient Successive Approximation Analog-to-Digital Converters: State-of-the-Art and A Design Example”, gives a thorough survey on the low-voltage and low-power successive-approximation register analog-todigital converters (SAR ADCs). Design considerations and implementation techniques of energy-efficient SAR ADCs are collected and discussed. The authors also give a design example to illustrate the procedure to design an energy-efficient SAR ADC. A new method to design the internal clock is proposed to facilitate the scaled sampling frequency, which provides more time for the digital-to-analog convert (DAC) and comparator to settle. The 10 bit ADC is simulated in a 0.13 μm CMOS technology. The signal-to-noise and distortion ratio (SNDR) is 54.41 dB with a 10 MHz input at a 50 MS/s sampling rate, drawing only 330 μW from 1.2 V. The main contribution of this article is on the survey side, nevertheless.

The second paper, “Characterization of Fundamental Logics for the Sub-Threshold Digital Design”, deals with a common problem in non-standard-voltage digital design and synthesis. As we know, digital circuits operating in the sub-threshold regime consume the least energy, and it is desired to be applied with strict energy constraints. These systems work at the lowest possible supply voltages instead of standard digital supply. However, it is not supported by the conventional design flow with default digital cells when the supply scales down to the sub-threshold regime. In the paper, the authors present a characterization flow of existing cell library with Synopsys NCX tools. The flow was also demonstrated in a 0.13 μm CMOS technology with the supply voltage of 300 mV.

As the guest editor of this issue, on behalf of the editorial committee of EET, I would like to express my gratitude to all the authors for their generous contribution by submitting the manuscripts; and to the reviewers for their time, effort, and expertise that have enabled an efficient review process. In particular, I would like to thank the editorial staff for their countless efforts and enormous help throughout the process.

I wish the special section continues at a high standard and grows to a showcase for best research articles in the area of energy-efficient technologies.

Qiang Li,Guest Editor

University of Electronic Science and Technology of China, China

December, 2013 at Aarhus

Dr. Li was the author of 50+ scientific publications, 2 international patents, and one book. He serves as a member of Editorial Board for theInternational Journal of RF and Microwave Computer-Aided Engineering(SCI-indexed) and reviewer for a number of scientific publications and funding agencies. He was the recipient of the New Century Excellent Talents Program Award from the Ministry of Education of China, and Teaching Excellence Award for Young Faculty Members from UESTC.

eceived his Ph.D. degree in electrical and electronic engineering from the Nanyang Technological University (NTU), Singapore. He has been working on analog/RF and mixed-signal circuits in both academia and industry, holding positions of RTP trainee, senior/research engineer, project leader, and technical consultant during 2001– 2009 in Singapore. In 2009, he returned to China as a professor at UESTC, Chengdu, where he has brought up the analog group. His research interests include ultra-low voltage and micro power analog/RF & mixed-signal circuits, data converters, and digital-intensive analog design techniques.

Digital Object Identifier: 10.3969/j.issn.1674-862X.2013.04.007